AMDVerified
Full Chip Timing Lead
- Salary
- ₹27–45 LPA
- Location
- Hyderabad, India
- Level
- Senior
- Experience
- Senior · 8+ years
Verified direct application link, checked by Astra
About the company & role
8+ years design signoff closure experience; timing closure at SoC and block level; STA, SDC, PnR, multi-voltage, ECO, scripting (TCL, Perl, Python, Makefile); Bachelor's or Master's in computer/electrical engineering.