MetaVerified
ASIC Engineer Intern, Design
- Region
- 🌐 Global
- Work mode
- Onsite
- Category
- Engineering
VerilogSystemVerilogHLSPythonPerl
Verified direct application link, checked by Astra
About the company & role
Pursuing a bachelor's degree in electrical or computer engineering, with Verilog, SystemVerilog, or HLS knowledge and computer architecture fundamentals; work authorization and return to degree program required.